Renesas launches first-generation 32-bit RISC-V CPU core

【Lansheng Technology News】Renesas Electronicsrecently announced the successful design, testing and launch of a 32-bit CPU core based on the open standard RISC-V instruction set architecture (ISA). As the first manufacturer in the industry to independently develop CPU cores for the 32-bit general-purpose RISC-V market, Renesas has created an open and flexible platform for the Internet of Things, consumer electronics, healthcare and industrial systems.

The new RISC-V CPU core will expand Renesas’ existing 32-bit microcontroller (MCU) IP product lineup, including the proprietary RX product family and the RA product family based on the Arm® Cortex®-M architecture.

RISC-V is an open ISA that is rapidly gaining popularity in the semiconductor industry because of its flexibility, scalability, high energy efficiency, and open ecosystem. Currently, many MCU suppliers have established joint investment alliances to accelerate the development of RISC-V products, and Renesas has successfully independently developed a new RISC-V core.

This versatile CPU can serve as a main application controller or as an auxiliary core in SoCs, on-chip subsystems, or even deeply embedded ASSPs. Following its previous launch of 32-bit voice control and motor control ASSP products and the RZ/Five 64-bit general-purpose microprocessor (MPU) based on a CPU core developed by Andes Technology Corp., Renesas has become a leader in the emerging RISC-V market .

RenesasRISC-V CPU's CoreMark/MHz performance reaches an astonishing 3.27, far exceeding similar architectures in the industry, and includes extensions that can improve performance while reducing code volume.

Renesas is providing samples based on the new core to some customers, and plans to launch the first RISC-V-based MCU and related development tools in the first quarter of 2024. Details of the new MCU products will also be announced at that time.