Samsung's GAA technology plans to increase transistor width by expanding nanosheets

【Lansheng Technology News】Jeong Ki-tae, vice president of Samsung Electronics’ foundry division, said on October 25, “In the 1.4nm process, the number of nanosheets has increased to 4, and the goal is to achieve it in 2027. Mass production.”

GAA is a transistor structure in which the gate surrounds four channels through which current flows. This technology improves data processing speed and power efficiency compared to existing FinFET structures covering three channels. Samsung Electronics has been using the GAA mass production 3nm process since the first half of last year. Competitors TSMC and Intel plan to apply GAA starting from the 2nm process.

Nanosheet refers to the channel of the GAA process. Samsung Electronics is implementing channels in the form of thin and wide nanosheets and applying them to the GAA process. The 3nm process currently being mass-produced by Samsung Electronics uses three nanosheets.

According to reports, expanding the number of nanosheets increases the width of the transistor, thereby improving the driving force. "This means that the movement of electrons can be maximized by increasing the number of channels. Using this, the semiconductor speed will also increase."

By adding nanosheets, Samsung Electronics is expected to further widen the GAA technology gap with TSMC and Intel. The two companies will start mass production of the 2nm process in 2025 and 2024 respectively. Intel plans to first apply the 2nm process to its own semiconductor production.

In addition, Samsung Electronics announced that it will apply advanced back-end power supply network (BSPDN) starting from 1.4nm. Advanced BSPDN is considered the successor technology to BSPDN. BSPDN is a design structure that improves power and signal lines and battery utilization bottlenecks by placing power routing on the backside of the wafer. Samsung Electronics plans to introduce BSPDN starting from the 2nm process.